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lorom and hirom mappings 
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Post lorom and hirom mappings
Hello to everybody.
I have read neviksti's MAD-1 documentation but there are some things I still don't understand about memory mappings, I need a little help.

1) WHY on the earth should developers have chosen between hirom or lorom mapping? It seems like they are very similar, except for the fact that lorom has 32k banks. Max rom sizes are the same (well, very similar), 32mbit for the mad-1 addressing; the speed is the same too.
Is the lorom convenient because it have registers in many other banks other than 00 (and following)? And why there aren't many large lorom games?

2) neviksti says in his doc that mad-1 lorom mapping allows SRAM in banks 70-7D:0000-7FFF, or nothing if there isn't a sram. Non-mad1 games (this chip has really an appropriate name :D) allows sram there, or ROM. wtf!?
Is that rom a mirror of upper bank (70-7D:8000-FFFF), in the same way it happens in banks 40-6F?

3) Simkin's memory map (and fusoya's lunar expand too) talks about a sram in 70-77:0000-7FFF for hirom mapping. Are them wrong? Or maybe they are describing some non-mad1 mappings?

4) when was mad-1 developed by Nintendo? Before this chip, was mapping always obtained by hard wiring the rom to the snes address bus?
I THINK to have understood that mad-1 was only necessary if the game had a sram to handle.

Thanks


Thu Feb 17, 2005 10:39 am
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I will add this..

With LoROM, you can have FastROM or SloROM. This means that data accessed in $8x:xxxx banks and above run the SNES CPU at 3.58Mhz because ROM access is faster there. The SNES CPU runs in SloROM mode for ROM access below those locations and the SNES CPU runs at 2.68Mhz.

I believe Hi-ROM is always at 3.58Mhz as well. I don't think developers really choose one or the other. I thnk LoROM was all there was at first. I don't really know though. I'm just guessing.

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Thu Feb 17, 2005 4:09 pm
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Nightcrawler wrote:
With LoROM, you can have FastROM or SloROM. This means that data accessed in $8x:xxxx banks and above run the SNES CPU at 3.58Mhz because ROM access is faster there. The SNES CPU runs in SloROM mode for ROM access below those locations and the SNES CPU runs at 2.68Mhz.

HiROM, LoROM, or whatever has nothing to do with FastROM/SlowROM (although it does require that the cart have ROM chips with fast enough access speeds). The speed is completely a function of the SNES: if you set bit 1 of the MEMSEL register, then accesses to $8000-$ffff in banks $80-$BF and all of banks $C0-$FF are FastROM, otherwise they're SlowROM. Note BTW that other regions ($2000-$3FFF and $4200-$5FFF in banks $00-$3F and $80-$BF) are always FastROM.


Fri Feb 18, 2005 1:50 am
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