Help on SNES cart types.

[Bregalad]

Hi, I hope I post this to the right place.
I wonder a bit about the cart types of the SNES.
I found no doccument related to that stuff, and I figured out what is below by myself. There are doccuments covering SNES memory mapping, but not really SNES cart types (even if it is related, it isn't exactly the same).

When you open any cartridge and watch its board name, there are 4 symbols (letters or numbers) that follows "SHVC-" that will teach attribute about the cart type :

The first symbol indicate the number of ROM chips. There most often is one, so the number '1' is written. Sometimes there is 2 ROM chips, so either 'B', 'L', 'Y' or '2' is written as the first symbol. The symbol choosen seems to vary in function of the overal size of both ROM chips, but I'm not sure.

The second symbol obviously indicate the ROM mapping type, so 'A' means LoRom and 'J' means HiRom. Other letters are for games using custom chips.

The third symbol is related to SRAM size. '0' means no SRAM, '1' means 2kB, '3' is 8kB, '5' is 32kB

I havent figured exactly what means the fourth symbol. 'M' is here for games with the MAD-1 chip in them, and the games that don't have either 'B' or 'N'.


Now the questions :
- Why some games have more than one ROM chip ? Having one big ROM chip is surely cheaper than have two small ones, and this rather complicate the board circuitry. I would think that it was to get intermediate ROM sizes that aren't power of 2 in size, like 12 meabit being 8+4, 24 megabit being 16+8, etc... But this is confirmed to be wrong, since my Tactics Ogre cart (24 megabit) has only one chip, and my Donkey Kong Country cart (32 megabit) has two chips !
I think Tactics Ogre actually has a 32 megabit chip, but the last 8 megabit is never adressed/empty.

- Is there a known difference between board names begining with '2', 'B', 'L' and 'Y' ??

- Is there a known difference between board names ending with 'B', 'M' and 'N' ?

- Why LoRom mapping is refered as "Mode 20" and HiRom as "Mode 21" ?

- Does the board circuitry varies in function of the speed of the ROM chip ? I'm almost sure it doesn't, but again, this isn't doccumented...

Thanks in advance.

[grinvader]

Having one big ROM chip is surely cheaper than have two small ones

Probably not. 2x16 is cheaper than 1x32, it's like that for everything (ram, usb keys, various cards).

[adventure_of_link]

You also need to take into factor special chips (eg: DSP series, Super FX series, SA-1, etc)

[Bregalad]

Probably not. 2x16 is cheaper than 1x32, it's like that for everything (ram, usb keys, various cards).

If you say so.... I'm still surprised.
Common EPROMs hardly go over 8 Megabits, but the common EPROMs aren't twice as expensive as the EPROM with the half of memory in it.
Since SNES chips aren't EPROM, but mask ROMs, and they were made some time ago, I can undertand that it was another story.
But logically, you have the same amound of silicium, but if you made two small chips, you need more plastic, more pins, etc... It also increase the complexity of the cart circuitry, since you have to do additionnal adress decoding to enable/disable chips. It logically would be more expensive.

Special chips are, well, special. I'd first undertand 100% how regular cartridges works.
I also havent found more doccumentations on those special chips than list of them with short description of their feature and example of games using the chips. Since both SNES9x and ZSNES emulates most of the special chips correctly, I think there *is* people arround that know how they works. I'm not hurried to code something for those chips or anything, but a little more info would be welcome.

[mozz]

Here's some good info about some of the special chips (the various DSP chips):

Overload's puzzle sheet

[Bregalad]

Looks interesting, but kinda complicated !!
Ok, last question (I'll try to ask it clearly unlike above).

Is there any difference between a SNES cart of, say, 8 megabit that have 2x 4megabit ROM chips and a SNES cart that has one single 8megabit ROM chip ?

[JohnDie]

It depends on the exact PCB model if there are differences. The MAD-1 PCBs all follow the same layout, as do the No-SRAM PCBs (SHVC-xx0N-xx) and the Non-MAD-1 PCBs (SHVC-xxxB-xx).
If you compare a SHVC-2A0N with 2 8Mbit ROMs to a SHVC-1A0N with a single 16 Mbit ROM there will be no difference in how the memory is mapped into the SNES address space.

Oh, and by the way, the letter directly after the SHVC- stands for the maximum size of the MaskROMs on the PCB. 1 means single ROM, up to 32Mbit (maximum varies with PCB revision), 2 means 2x 8M MaskROMs, Y means 2x 4M MaskROMs, L means 2x 32M MaskROMs (upto, common is 32M+16M) and B stands for 2x 16M MaskROMs.

[Bregalad]

Thanks, I think this clarifies things up.
What's the difference between SHVC-xxxB and SHVC-xxxN ? Both use discrete logic based decoding methods. 'B' often have SRAM and 'N' often doesnt, but there is exeptions.

[JohnDie]

As far as I know, the 'B' stands for Battery (or Backup) and the 'N' stands for 'No SRAM'. PCBs having their ID code end in a 'B' will allow you to use SRAM on the cartridge, of course you don't have to.
I have not yet seen any exceptions to this rule. All PCBs I have with a PCB ID ending in 'B' have SRAM and a battery to preserve SRAM contents. Do you have any detailed information and maybe some pictures of those exceptions? That would be great.

You're certainly right with the assumption, that 'B' and 'N' types use discrete logics to do the memory mapping. Only the 'M' types use a MAD-1. Of course things are more complicated for all the special chip PCBs, but that is another story.

EDIT: Besides 'N', 'B' and 'M' there is also 'X' (so the ID becomes SHVC-...X-..), which stands for a MAD-2 based memory mapping (used on DSP cartridges, eg. newer Super Mario Kart carts).

[Bregalad]

My Super Mario Kart have no MAD chip on it. It is SHVC-1K1B.
I'm unsure about exeption. There is a strange board : SHVC-1DS0B. It has a battery, but no SRAM ! It is found in Exhaus Heat II, I don't have that game but I found it here.
I think the data to be battery backed is inside the big special chip, called ST-OTO.

I'm unsure how LoROMs greather than 16 Megabit are mapped.
Some docs says that without MAD-1 chip, there is data at bank $40-$6f (or $c0-$ef) $0000-$7ffff. This is the mirror of the normal ROM that there is at $8000-$ffff, right ?
Also, since banks $70-$7d (or $e0-$ed) are entierly reserved for SRAM, my conclusions are that the maximum size for a LoROM game is of $70 banks of 32kB, wich is 28 Megabits (I never saw any above 24 Megabits).
I think Star Ocean is considered as a LoROM by emulators, but it should be an exeption, because it uses a special chip. Does it uses the $0000-$7ffff space in some manner or is it just mapped as a HiROM ?

Also, doccuments doesn't say how HiROM games above 32 Megabits are mapped. I think it should be the first 32 Megabits are mapped normally, and the last 16 Megabits are mapped into $00-$3f : $8000-$7ffff in 32kB chunks. So the game is half HiROM and half LoROM. So, even if Star Ocean is considered as LoROM and Tales of Phantasia as HiROM, this makes no differance since both are both types. Is that right ?

Edit : Hey, you actually is the guy who take all those pictures of each SNES card in his possesion ? Great job. I think a similar job should be done for NES cards.

[JohnDie]

My Super Mario Kart have no MAD chip on it. It is SHVC-1K1B.
I'm unsure about exeption. There is a strange board : SHVC-1DS0B. It has a battery, but no SRAM ! It is found in Exhaus Heat II, I don't have that game but I found it here.
I think the data to be battery backed is inside the big special chip, called ST-OTO.

Yes, that is right. The page you linked to is my page, btw. The ST010 chip has internal SRAM. The ST010 is a DSP-like special chip so that PCB is not a "standard" PCB (in the meaning of only ROM + RAM). But it does fit the naming scheme: The '0' stands for 'no SRAM' mounted on the PCB and the 'B' means 'Battery Backup' which is correct.
There's also a picture of my MAD-2 Mario Kart available at my page.

I'm unsure how LoROMs greather than 16 Megabit are mapped.
Some docs says that without MAD-1 chip, there is data at bank $40-$6f (or $c0-$ef) $0000-$7ffff. This is the mirror of the normal ROM that there is at $8000-$ffff, right ?
Also, since banks $70-$7d (or $e0-$ed) are entierly reserved for SRAM, my conclusions are that the maximum size for a LoROM game is of $70 banks of 32kB, wich is 28 Megabits (I never saw any above 24 Megabits).

LoROM PCBs without a MAD-1 (the 'B' and 'N' types) essentially mirror ROM by ignoring certain address lines when decoding the address. A23 is ignored, hence the banks 00-7F will mirror to banks 80-FF (with the exception of banks 7E and 7F, because these banks are decoded by the SNES itself). Ignoring A15 leads to mirroring offsets 0000-7FFF to offsets 8000-FFFF. This explains why there is ROM data present in 40-6F:0000-7FFF. It's just a mirror of 40-6F:8000-FFFF. The same applies to banks 70-7D (non-SRAM PCBs) and to banks C0-EF (and F0-FF in non-SRAM PCBs).

The cartridge decides which area is mapped to ROM or RAM, there is no "dedicated" memory area for SRAM. Non-MAD-1 board do map SRAM to the whole banks 70-7D and F0-FF. This is again because of the mirroring that occurs by ignoring A15. When a MAD-1 is used, this is somewhat different. The MAD-1 does use A15 to distinguish between the upper and the lower half of a bank in LoROM mode. The SRAM is only mapped into the lower half of the banks, so there's SRAM only at 70-7D:0000-7FFF and F0-FF:0000-7FFF. The upper half is mapped to ROM.

There are LoROMs with 32MBit ROM size, I think Tokimeki Memorial is one example.

I think Star Ocean is considered as a LoROM by emulators, but it should be an exeption, because it uses a special chip. Does it uses the $0000-$7ffff space in some manner or is it just mapped as a HiROM ?

Star Ocean is a S-DD1 based cartridge and cannot be considered as an ordinary LoROM. I have to take a deeper look at the exact memory map for this one.

Also, doccuments doesn't say how HiROM games above 32 Megabits are mapped. I think it should be the first 32 Megabits are mapped normally, and the last 16 Megabits are mapped into $00-$3f : $8000-$7ffff in 32kB chunks. So the game is half HiROM and half LoROM. So, even if Star Ocean is considered as LoROM and Tales of Phantasia as HiROM, this makes no differance since both are both types. Is that right ?

Tales of Phantasia is a good example for a HiROM with more than 32 Mbit ROM. It has a SHVC-LJ3M PCB featuring 32M + 16M MaskROMs. The 32M ROM is mapped to banks 80-FF in ordinary HiROM style (A15 is not ignored, so no mirroring occurs between the upper and lower halves of the banks C0-FF. A21 is ignored so that there is a mirror between banks 80-BF and banks C0-FF and between 00-3F and 40-7F.) The smaller 16M ROM is mapped in the same style to the lower banks 40-7F having a mirror of the upper halves of the banks 40-7F in banks 00-3F. SRAM is mapped to 80-BF:6000-7FFF only (and not in banks 00-3F!).

Edit : Hey, you actually is the guy who take all those pictures of each SNES card in his possesion ? Great job. I think a similar job should be done for NES cards.

Thanks! I think it helps to understand the inner workings of the cartridges much better. Having something like this for the NES would be very cool. Any volunteers? *g*

[Bregalad]

Thanks !
If I undestand well, Tales of Phantasia can only run his 32k chunk at high-speed, and the 16k lower half at low speed, by the fact that A23 is taken in accound for adress decoding. I think it is still possible to read data from the lower chunk at full speed, so the game will make itself so that it puts mainly code in the 32k chunk and data in the 16k chunk, to benefit from the fastrom posibilities. Is that right ? That would even enable in theory 64Megabit games, even if no exists. No doccument say that the MAD-1 chip can take A23 in account.

Looks like the system RAM is only there in the low-speed region ($7e0000-$7fffff) exept for the shadwowed RAM that is also acessible at $800000-$801fff, $810000-$811fff, etc.... I think most games will put the programm here when the copy code to RAM (self-modifiying code, etc...), so that they can run fast, or use the cartridge SRAM ($fd000-$fd1fff for LoRoms, $8x6000-$8x7fff for HiRoms).

Does the programmer needs to manually turn the clock down or could a game just run fast at any time ? I've head the the clock was swiched to something else when some PPU accessing is done. Does the board manufacury affect if the game can run fast or not, or is it only the ROM chip manufactury ?

Is there any games having SRAM, but no battery ? I doubt, because the SNES already have 128kB of RAM on its own, so just add plain 8kB wouldn't change anything to the possibilities that a game engine have.
A lot of NES games have RAM but no battery, but the NES have only 2kB of RAM on its own, so 8kB additionnal really changes everything !
There is already a site with picture of most NES boards, but there isn't game covers scan that come alongs, only the boards, so it is only interesting for developpement purposes and not for collection purposes.

Edit : Your site lacks some interesting games especially the 3 SNES Final Fantasy games. I think FF4 is SHVC-1A3B, FF5 should be SHVC-1J3M or SHVC-1J3B. FF6 should be something like SHVC-2J3M, SHVC-BJ3M or simply SHVC-1J3M. This summons another question. Is there HiRom carts with no MAD-1 chip ? I think the card with only 16 kBits and no SRAM doesn't need a MAD-1 chip. I don't know larger cards without SRAM. Nintendo had enough money to pay SRAM even for games that doesn't really need it at the end of the SNES' life (like Donkey Kong Country, that could really work with passwords).

[JohnDie]

Thanks !
If I undestand well, Tales of Phantasia can only run his 32k chunk at high-speed, and the 16k lower half at low speed, by the fact that A23 is taken in accound for adress decoding. I think it is still possible to read data from the lower chunk at full speed, so the game will make itself so that it puts mainly code in the 32k chunk and data in the 16k chunk, to benefit from the fastrom posibilities. Is that right ? That would even enable in theory 64Megabit games, even if no exists. No doccument say that the MAD-1 chip can take A23 in account.

Yes, you got it right. Although in theory even larger games could be possible if one would take A21 in account, thus breaking the mirroring of banks 00-3F to 40-7F (and 80-BF to C0-FF). This would make some more room for ROM. Which address line is taken into account by the MAD-1 is just a matter of how you connect it to the address lines. I'm sure that one could make up even more complex mappings with it.

Looks like the system RAM is only there in the low-speed region ($7e0000-$7fffff) exept for the shadwowed RAM that is also acessible at $800000-$801fff, $810000-$811fff, etc.... I think most games will put the programm here when the copy code to RAM (self-modifiying code, etc...), so that they can run fast, or use the cartridge SRAM ($fd000-$fd1fff for LoRoms, $8x6000-$8x7fff for HiRoms).

Does the programmer needs to manually turn the clock down or could a game just run fast at any time ? I've head the the clock was swiched to something else when some PPU accessing is done. Does the board manufacury affect if the game can run fast or not, or is it only the ROM chip manufactury ?

I'm currently not 100% sure about access timing for the WRAM areas, I think you can only access them at 2.68 MHz. FastROM timing is possible, if the ROM is able to respond in 120ns to a request from the SNES. Of course there is a certain amount of time that is added by the address decoding in the cartridge. FastROM can be enabled by the program using a hardware register.
Try searching through the Snes9x forum (also the old forum). There is a post stating the possible access timing for every single memory region.

Is there any games having SRAM, but no battery ? I doubt, because the SNES already have 128kB of RAM on its own, so just add plain 8kB wouldn't change anything to the possibilities that a game engine have.
A lot of NES games have RAM but no battery, but the NES have only 2kB of RAM on its own, so 8kB additionnal really changes everything !

I don't know of any standard cartridge containing SRAM without a battery, but there might be some. There are special chip cartridges that have SRAM but no battery to backup SRAM contents. This is because the special chips need some work RAM, too.

There is already a site with picture of most NES boards, but there isn't game covers scan that come alongs, only the boards, so it is only interesting for developpement purposes and not for collection purposes.

Do you have a link to that site?

Edit : Your site lacks some interesting games especially the 3 SNES Final Fantasy games. I think FF4 is SHVC-1A3B, FF5 should be SHVC-1J3M or SHVC-1J3B. FF6 should be something like SHVC-2J3M, SHVC-BJ3M or simply SHVC-1J3M. This summons another question. Is there HiRom carts with no MAD-1 chip ? I think the card with only 16 kBits and no SRAM doesn't need a MAD-1 chip. I don't know larger cards without SRAM. Nintendo had enough money to pay SRAM even for games that doesn't really need it at the end of the SNES' life (like Donkey Kong Country, that could really work with passwords).

I tried collecting cartridges with different PCBs. But maybe I'll get some FF cartridges in the future, if I can afford it. It's also possible to map larger SRAM areas without a MAD-1, it's just a matter of some discrete logic. There are indeed some HiROM cartridges without a MAD-1, at least according to Overload's list at the Super Sleuth homepage.
And of course there are some large HiROM cartridges without SRAM: Killer Instinct, Mortal Kombat, etc.

[creaothceann]

Try searching through the Snes9x forum (also the old forum). There is a post stating the possible access timing for every single memory region.

I think the info in anomie's memmap.txt is the same - at least it should be more recent.
timing.txt might also be relevant.

[Bregalad]

Thanks.
I'm unsure about your speed doccument.
Saying that the speed is slow when A23 is low and fast when A23 is high and another bit set in a register is only true for ROM ?
Then, the SNES automatically setup the good speed when writing/reading to something, or jumping to somewhere else than ROM ?

[JohnDie]

Thanks for the links, creaothceann. This was the information I meant, didn't think of romhacking.net

@Bregalad: Yes, the access speed depends on the memory region where ROM is accessed and on the setting of the FastROM register. As you can see, there are certain other areas that are always accessed with Fast speed and others that are always accessed at Slow or even XSlow speed.
Especially, WRAM is always accessed at Slow speed, no matter in which bank.[/quote]

[Bregalad]

It makes more sense now. Strangly, RAM is said to be usually faster than ROM. Whathever...
I forgot to show you the page for NES boards. It is here : http://www.tripoint.org/kevtris/mappers/mappers.html
Unfortunately it does only mention mappers and boards, and not related games at all. Some boards are even missing, like HVC-EKROM (used in Just Breed & Gemfire, I have JB at home), or HVC-FJROM (only found on Fire Emblem games, I only heard of it, and never saw any). NES boards are more complicated than SNES boards since there is almost no logic in their name as there is with SNES boards. The first letter tell the mapper, but what about the second ? It just gets other meaning in function of the mapper. Finally the name is terminated with "ROM", but sometimes on prototypes it is "EPROM", I think this is related to the pinout of ROM chips.

[Overload]

Mode 20, 21, 22, 23, 25 etc. are official map modes used by nintendo. LoROM and HiROM were terms made up by ROM hackers.

I don't know of any standard cartridge containing SRAM without a battery, but there might be some. There are special chip cartridges that have SRAM but no battery to backup SRAM contents. This is because the special chips need some work RAM, too.

F-Zero (J) may be the only game that has SRAM without a battery. I don't know for sure though.

I tried collecting cartridges with different PCBs. But maybe I'll get some FF cartridges in the future, if I can afford it. It's also possible to map larger SRAM areas without a MAD-1, it's just a matter of some discrete logic. There are indeed some HiROM cartridges without a MAD-1, at least according to Overload's list at the Super Sleuth homepage.
And of course there are some large HiROM cartridges without SRAM: Killer Instinct, Mortal Kombat, etc.

There is a pdf file included with the latest Super Sleuth that has information on standard, dsp and super fx cartridge pcbs.